How do decade counters, decoder/drivers, seven-segment displays and the 4017 produce a counting display or sequence?
BCD and decade counters, the seven-segment display with its decoder/driver to show decimal digits, the 4017 decade counter as a sequencer with one output high at a time, and resetting a counter early to make a custom count length.
A focused answer to WJEC Eduqas GCSE Electronics on decade counters and displays, covering BCD and decade counters, the seven-segment display and its decoder/driver, the 4017 sequencer, and resetting a counter to make a custom count length.
Reviewed by: AI editorial process; not yet individually human-reviewed
Have a quick question? Jump to the Q&A page
Jump to a section
What this topic is asking
WJEC Eduqas wants you to know BCD and decade counters, how a seven-segment display with its decoder/driver shows decimal digits, how the 4017 decade counter works as a sequencer (one output high at a time), and how to reset a counter early to make a custom count length. This is the applied end of sequential logic.
BCD and decade counters
A plain binary counter counts in powers of two; a decade counter is arranged to count in tens to suit decimal displays. BCD is the natural output: each decimal digit becomes its own 4-bit binary code, so 7 is 0111 and 9 is 1001. After 9 (1001) the counter rolls back to 0. Decade counters are used wherever you count in decimal, such as a digital tally or a clock.
Seven-segment displays and the decoder/driver
The display cannot use the BCD code directly - it needs to know which of its seven segments to switch on for each digit. The decoder/driver does this translation (for example, BCD 0010 lights the segments that form a "2") and provides enough current for the LEDs. So the chain is decade counter then decoder/driver then seven-segment display. Leaving out the decoder/driver is a common design error, because the raw count would not form readable digits.
The 4017 as a sequencer
Unlike a BCD counter that outputs a 4-bit code, the 4017 already decodes the count to ten separate output lines, lighting each in turn. This is ideal for sequences: running lights, a stepper of stages, or triggering events in order. Each clock pulse advances the single high output by one position, and after the tenth it wraps around.
Resetting for a custom count length
This is the standard way to set a custom modulus. You decide how many steps you want, identify the output one beyond the last wanted step, and wire it to the reset. The instant that output goes high, the counter clears to 0, so that step is skipped and the sequence length is fixed. The same idea shortens a BCD decade counter (using logic on its outputs to reset) to count, say, 0 to 5 for a minutes-units display.
Try this
Q1. State what a decade counter counts up to before it resets. [1 mark]
- Cue. It counts 0 to 9 (ten states) then resets to 0.
Q2. State which output of a 4017 you would connect to reset to make it count 0 to 7. [1 mark]
- Cue. The "8" output (one beyond the last wanted step), so it resets after 7.
Exam-style practice questions
Practice questions written in the style of WJEC exam questions on this dot point, with worked answer explainers. The year tag is the paper they imitate, not the source.
Eduqas style4 marksDescribe how a decade counter, a decoder/driver and a seven-segment display are connected to show the digits 0 to 9, and state the role of each block.Show worked answer →
A Component 2 describe question on a counting display. A decade counter counts clock pulses from 0 to 9 and outputs the count as a BCD (binary-coded decimal) number (1 mark). The decoder/driver takes this BCD code and converts it into the correct pattern of segments to light, and supplies enough current to drive them (1 mark). The seven-segment display lights those segments to show the decimal digit (1 mark). Connected in a chain - counter to decoder/driver to display - each clock pulse advances the displayed digit by one, 0 to 9 then back to 0 (1 mark for the chain and the 0 to 9 behaviour). Markers reward the role of each block and the correct order. A common error is to connect the counter straight to the display without the decoder/driver.
Eduqas style4 marksA 4017 decade counter is to be used to count repeatedly from 0 to 5 (six steps). Explain how resetting can be used to shorten the count, and how the 4017 acts as a sequencer.Show worked answer →
A Component 2 design question on the 4017. The 4017 has ten outputs, and as it counts only one output is high at a time, stepping along the outputs with each clock pulse - this makes it a sequencer (1 mark for one-at-a-time outputs). To count 0 to 5 (six steps) instead of the full ten, connect the output that would be the seventh step (the "6" output) back to the reset input (2 marks for feeding the appropriate output to reset). When the counter reaches that output it is immediately reset to 0, so it repeats the six-step sequence (1 mark). Markers reward one-output-high sequencing and using an output to reset early to set the count length. A common error is to reset on the wrong output.
Related dot points
- Building a 1-bit and a 2-bit binary up-counter from rising-edge-triggered D-type flip-flops, how each stage divides the clock frequency by two, and reading the count from a timing diagram.
A focused answer to WJEC Eduqas GCSE Electronics on binary counters, covering building 1-bit and 2-bit counters from D-type flip-flops, how each stage halves the clock frequency, and reading the count from a timing diagram.
- The rising-edge-triggered D-type flip-flop: how it copies its D input to its Q output on the rising edge of the clock, its use as a data latch and for data transfer, and reading its behaviour from a timing diagram.
A focused answer to WJEC Eduqas GCSE Electronics on the rising-edge-triggered D-type flip-flop, covering how it copies D to Q on the clock edge, its use as a latch and for data transfer, and reading timing diagrams.
- Logic levels (logic 1 and logic 0 as high and low), the NOT, AND, OR, NAND, NOR and XOR gates, their logic symbols, and constructing and using truth tables to describe combinational logic.
A focused answer to WJEC Eduqas GCSE Electronics on logic gates and truth tables, covering logic levels, the NOT, AND, OR, NAND, NOR and XOR gates and their symbols, and constructing truth tables for combinational logic.
- Boolean expressions and the basic Boolean identities, simplifying combinational logic, building any logic function from NAND gates (NAND universality), and designing a logic system to meet a requirement using a data sheet to select ICs.
A focused answer to WJEC Eduqas GCSE Electronics on Boolean algebra and NAND logic, covering Boolean expressions and identities, simplifying logic, building any gate from NAND gates, and designing a logic system using a data sheet.
- The 555 timer in astable mode: how it produces a continuous square-wave output, the equations for frequency and period, and the meaning and calculation of the mark-space ratio.
A focused answer to WJEC Eduqas GCSE Electronics on the 555 astable timer, covering how it produces a continuous square-wave output, the equations for frequency and period, and the mark-space ratio.
Sources & how we know this
- WJEC Eduqas GCSE Electronics specification (from 2017) — WJEC Eduqas (2017)