What are the logic gates, and how do truth tables describe their behaviour?
Logic levels (logic 1 and logic 0 as high and low), the NOT, AND, OR, NAND, NOR and XOR gates, their logic symbols, and constructing and using truth tables to describe combinational logic.
A focused answer to WJEC Eduqas GCSE Electronics on logic gates and truth tables, covering logic levels, the NOT, AND, OR, NAND, NOR and XOR gates and their symbols, and constructing truth tables for combinational logic.
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What this topic is asking
WJEC Eduqas wants you to understand digital logic levels (logic 1 and logic 0 as high and low voltages), recognise the logic gates (NOT, AND, OR, NAND, NOR and XOR) and their symbols, and construct and use truth tables to describe what a combinational logic circuit does. This is the language of all digital processing.
Logic levels
Treating signals as just high or low is what makes digital electronics reliable: a slightly noisy voltage is still read as a clear 1 or 0. A logic gate reads its inputs as 1s and 0s and produces a 1 or 0 output. This is different from analogue electronics, where the exact voltage carries the information.
The NOT, AND and OR gates
These three are the basic building blocks. The NOT gate is drawn as a triangle with a small circle (the circle means "invert"). The AND gate is a D-shape; the OR gate is a curved shield shape. Their two-input truth tables are: AND gives 0,0,0,1; OR gives 0,1,1,1 (for inputs 00, 01, 10, 11). The AND gate behaves like two switches in series (both needed); the OR gate like two switches in parallel (either will do).
The NAND, NOR and XOR gates
NAND and NOR are the AND and OR gates with an inverting circle added to the output, so their truth tables are the inverse of AND and OR: NAND gives 1,1,1,0 and NOR gives 1,0,0,0 (for inputs 00, 01, 10, 11). The XOR gate, drawn like an OR with an extra curved line, gives 0,1,1,0: it detects difference, which is useful for adders and comparators. NAND and NOR are especially important because each can be used to build any other gate.
Truth tables and combinational logic
The truth table is the master tool of combinational logic: it lets you work out the output of a circuit of several gates by following the signal through gate by gate, and it lets you check that a circuit does what is required. List the inputs in binary counting order (00, 01, 10, 11), then fill in the output for each row. Because combinational logic has no memory, the same inputs always give the same output, so the table is complete.
Try this
Q1. State the output of a two-input NOR gate for inputs A = 0, B = 0. [1 mark]
- Cue. NOR is 1 only when all inputs are 0, so the output is 1.
Q2. State, in words, when an XOR gate gives an output of 1. [1 mark]
- Cue. When its two inputs are different (one 1 and one 0).
Exam-style practice questions
Practice questions written in the style of WJEC exam questions on this dot point, with worked answer explainers. The year tag is the paper they imitate, not the source.
Eduqas style3 marksConstruct the truth table for a two-input AND gate and a two-input OR gate.Show worked answer →
A Component 1 truth-table question. For two inputs A and B there are four rows (00, 01, 10, 11). The AND gate outputs 1 only when both inputs are 1: outputs 0, 0, 0, 1 down the rows (2 marks for a correct AND column). The OR gate outputs 1 when either or both inputs are 1: outputs 0, 1, 1, 1 (1 mark for a correct OR column). Markers reward all four input rows and the correct output column for each gate. A common error is to muddle the AND and OR outputs or to miss a row.
Eduqas style4 marksState the output of a NOT gate, a NAND gate and a NOR gate, and explain how a NAND gate relates to an AND gate.Show worked answer →
A Component 1 recall and explain question. A NOT gate (inverter) inverts its single input: output 1 for input 0, and 0 for input 1 (1 mark). A NAND gate outputs 0 only when all inputs are 1, otherwise 1 (it is an AND followed by a NOT) (1 mark). A NOR gate outputs 1 only when all inputs are 0, otherwise 0 (an OR followed by a NOT) (1 mark). A NAND gate is an AND gate with its output inverted, so its truth table is the opposite of the AND gate's (1 mark). Markers reward the three gate behaviours and the AND-then-invert relationship.
Related dot points
- Boolean expressions and the basic Boolean identities, simplifying combinational logic, building any logic function from NAND gates (NAND universality), and designing a logic system to meet a requirement using a data sheet to select ICs.
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- The rising-edge-triggered D-type flip-flop: how it copies its D input to its Q output on the rising edge of the clock, its use as a data latch and for data transfer, and reading its behaviour from a timing diagram.
A focused answer to WJEC Eduqas GCSE Electronics on the rising-edge-triggered D-type flip-flop, covering how it copies D to Q on the clock edge, its use as a latch and for data transfer, and reading timing diagrams.
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Sources & how we know this
- WJEC Eduqas GCSE Electronics specification (from 2017) — WJEC Eduqas (2017)