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WJEC GCSE Electronics: combinational logic systems overview

An overview of the combinational logic content in Component 1 of WJEC Eduqas GCSE Electronics, covering logic levels, the NOT, AND, OR, NAND, NOR and XOR gates, truth tables, Boolean expressions and identities, simplification, NAND universality, and designing a logic system using a data sheet.

Generated by Claude Opus 4.86 min readWJEC Eduqas GCSE Electronics, Component 1

Reviewed by: AI editorial process; not yet individually human-reviewed

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  1. What the topic covers
  2. How this content is examined
  3. How to study it
  4. For the official specification

The combinational logic content of WJEC Eduqas GCSE Electronics is the digital heart of Component 1 (Discovering Electronics). It covers logic levels, the logic gates and their truth tables, Boolean algebra and simplification, the universal NAND gate, and designing a logic system. This page maps the content and links to a focused answer page for each part.

What the topic covers

Logic gates and truth tables. Logic levels (1 and 0 as high and low), the NOT, AND, OR, NAND, NOR and XOR gates with their symbols, and constructing truth tables for combinational logic. See Logic gates and truth tables.

Boolean algebra and NAND logic. Boolean expressions and identities, simplifying logic to use fewer gates, building any function from NAND gates, and designing a logic system using a data sheet. See Boolean algebra and NAND logic.

How this content is examined

This content sits in Component 1 (Discovering Electronics), a written paper of 1 hour 30 minutes worth 40% of the GCSE. Expect to construct truth tables, identify and name gates, write and simplify Boolean expressions, build functions from NAND gates, and design a small logic system to a requirement, choosing the IC from a data sheet.

How to study it

  1. Learn every gate's truth table. NOT, AND (0,0,0,1), OR (0,1,1,1), NAND (1,1,1,0), NOR (1,0,0,0), XOR (0,1,1,0).
  2. Read circuits gate by gate. Follow the signal through to build the output truth table or Boolean expression.
  3. Know the Boolean identities. Use them to simplify and cut the gate count.
  4. Remember NAND is universal. Any gate can be built from NANDs; a NAND with joined inputs is a NOT.
  5. Design from the requirement. Turn "when should the output be 1?" into a truth table or expression, simplify, then pick the IC from its data sheet.

For the official specification

WJEC Eduqas publishes the full GCSE Electronics specification, past papers and mark schemes at wjec.co.uk. Always revise from the current specification and the board's own past papers, because question style and the printed equation and symbol lists are board-specific.

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