How do you design a combinational logic circuit from a specification and simplify it with a Karnaugh map?
Combinational logic design: deriving a circuit from a truth table or specification, sum-of-products form, simplification with Karnaugh maps, and building any function from NAND gates only.
A focused answer to WJEC A-Level Electronics combinational logic design, covering deriving a circuit from a truth table, sum-of-products form, simplification using Karnaugh maps, the universality of the NAND gate, and the design process from specification to gates.
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What this dot point is asking
Once you know the gates, the next skill is designing a circuit to meet a specification. WJEC expects you to turn a worded requirement or truth table into a Boolean expression in sum-of-products form, simplify it with a Karnaugh map, and realise it in gates, including using NAND gates only. The Karnaugh-map simplification and the majority/voting style of problem are core exam content worth several marks.
The answer
From specification to expression
Simplifying with a Karnaugh map
The art is to make the groups as large as possible and to allow them to overlap, because a larger group eliminates more variables. Groups may also wrap around the edges of the map.
The NAND-only realisation
Examples in context
- Example 1. A majority voter for redundant sensors
- A safety system with three sensors fires when at least two agree, using derived above. The Karnaugh map turns four three-input minterms into three two-input AND terms, halving the gate count and making the circuit cheaper and more reliable.
- Example 2. A seven-segment decoder
- Driving each segment of a numeric display from a four-bit binary input is a combinational problem: each segment has its own truth table over the sixteen inputs, simplified on a Karnaugh map. This is why a single decoder chip can light the right segments for every digit.
- Example 3. A one-bit full adder
- Adding two bits plus a carry needs a sum output (three XOR gates' worth of logic) and a carry output (a majority function). Designing each from its truth table and simplifying gives the standard adder cell that, chained together, performs binary arithmetic in every processor.
Try this
Q1. A circuit has output high only when input A is high and input B is low. Write its sum-of-products expression. [2 marks]
- Cue. Only the row (A,B) = (1,0) gives a high output, so .
Q2. State the largest group of 1s you should aim for on a Karnaugh map and explain why larger is better. [2 marks]
- Cue. The largest power-of-two block (2, 4, 8...); a larger group eliminates more variables, giving a simpler expression and fewer gates.
Exam-style practice questions
Practice questions written in the style of WJEC exam questions on this dot point, with worked answer explainers. The year tag is the paper they imitate, not the source.
WJEC Eduqas 20216 marksA system has three inputs A, B and C and must give a high output when two or more inputs are high. Write the sum-of-products expression from the truth table, then use a Karnaugh map to simplify it.Show worked answer →
List the rows where two or more inputs are high: (A,B,C) = (0,1,1), (1,0,1), (1,1,0) and (1,1,1).
Sum of products from these rows: .
Plot these four minterms on a three-variable Karnaugh map and group adjacent ones. The cell ABC is adjacent to each of the other three, so three pairs form: AB (the pair and ), AC (the pair and ) and BC (the pair and ).
Simplified expression: , a majority voter. This needs three AND gates and one OR gate instead of four three-input AND gates.
Markers reward the four correct minterms, valid grouping on the map, and the simplified .
WJEC Eduqas 20193 marksExplain why any combinational logic function can be built using only NAND gates, and state one practical advantage of doing so.Show worked answer →
A NAND gate can be wired to make every basic function: tying its inputs together makes a NOT, a NAND followed by a NOT (another NAND) makes an AND, and by De Morgan a NAND with inverted inputs makes an OR. Since AND, OR and NOT are sufficient to build any function, NAND alone is sufficient too, which is why it is called a universal gate.
Practical advantage: a circuit can be made from a single type of chip (for example a quad-NAND package), which simplifies stock, lowers cost and eases fault-finding.
Markers reward the universality argument (NAND makes NOT, AND and OR) and one valid practical advantage.
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Sources & how we know this
- WJEC Eduqas GCE A-level Electronics specification — WJEC Eduqas (2017)