What does the Eduqas digital systems module cover?

It covers logic gates and Boolean algebra (AND, OR, NOT, NAND, NOR, XOR, truth tables, the laws, De Morgan's laws and universal gates), combinational logic design (sum of products from a truth table, Karnaugh-map minimisation, half and full adders, decoders, encoders and multiplexers), sequential logic and flip-flops (the SR latch, the D-type and JK flip-flops, edge triggering), counters and shift registers (ripple and synchronous counters, modulo-n counting, serial and parallel registers), the 555 timer in astable and monostable modes, and binary, hexadecimal and two's-complement arithmetic.

Which formulae and rules recur most across this module?

De Morgan's laws $\overline{A + B} = \overline{A} \cdot \overline{B}$ and $\overline{A \cdot B} = \overline{A} + \overline{B}$, the half-adder sum $S = A \oplus B$ and carry $C = A \cdot B$, the counter state count $2^n$, the 555 astable frequency $f = \frac{1.44}{(R_1 + 2R_2)C}$, the 555 monostable pulse $T = 1.1RC$, and the two's-complement rule (invert and add one) with subtraction by addition.

What is the most common mistake in this module?

Misapplying De Morgan's laws by breaking the bar without swapping the operator (or vice versa). Close behind are confusing OR with XOR, using the 555 monostable formula for the astable (or forgetting the factor of 2 on R2 in the astable), miscounting counter states (n flip-flops give 2^n states), and forgetting to add one when forming a two's-complement negative.

How is the 555 timer examined in Eduqas Electronics?

As an astable you calculate the output frequency from $f = \frac{1.44}{(R_1 + 2R_2)C}$ and recognise the above-50-per-cent duty cycle; as a monostable you find the single pulse duration from $T = 1.1RC$ or work backwards to a timing resistor. You also explain the role of oscillators (the 555 or a crystal) in generating the clock that steps counters and flip-flops.

How should I revise digital systems?

Master the gates, truth tables and Boolean simplification (naming each law) first. Then practise deriving and minimising combinational logic with Karnaugh maps and learn the adder, decoder and multiplexer blocks. Learn the flip-flops (SR, D, JK) and edge triggering, then counters (states, modulo-n, ripple versus synchronous) and shift registers, the 555 astable and monostable calculations, and binary and two's-complement arithmetic. Drill the conversions and timing calculations under timed conditions.

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Eduqas A-Level Electronics Digital systems: logic gates, combinational and sequential logic, counters and 555 timers

A deep-dive Eduqas A-Level Electronics guide to the digital systems module spanning Components 1 and 2. Covers logic gates and Boolean algebra, combinational logic design with Karnaugh maps and adders, sequential logic and flip-flops, counters and shift registers, the 555 timer in astable and monostable modes, and binary and two's-complement arithmetic, with the calculations Eduqas repeats.

Generated by Claude Opus 4.816 min readA410QS Components 1 and 2Updated 2026-06-02

Reviewed by: AI editorial process; not yet individually human-reviewed

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What this module actually demands
Static logic: gates, combinational design and numbers
Sequential logic: memory, counting and timing
How this module is examined
Check your knowledge

What this module actually demands

Digital systems is the largest and most distinctive part of Electronics, building from single gates to complete sequential systems. It spans Component 1 (logic, combinational design, number systems) and Component 2 (sequential logic, counters, timing). The examiners reward fluent Boolean simplification with named laws, correct combinational design and minimisation, a clear grasp of how flip-flops give memory, and accurate counter and 555 timer calculations.

This guide walks through the topics in order and sets out the exam patterns Eduqas repeats. Each topic has a matching dot-point page with practice; this overview ties them together.

Static logic: gates, combinational design and numbers

Logic gates and Boolean algebra define the gates and truth tables, the laws of Boolean algebra, De Morgan's laws and the universal NAND and NOR gates. Combinational logic design derives a sum-of-products expression from a truth table, minimises it with a Karnaugh map, and covers the half and full adder, decoder, encoder and multiplexer. Binary arithmetic and number systems convert between binary, denary and hexadecimal, add in binary, and use two's complement for signed numbers and BCD for displays.

Sequential logic: memory, counting and timing

Sequential logic and flip-flops introduce feedback for memory, the SR latch, the clocked D-type and JK flip-flops, and edge triggering. Counters and shift registers chain flip-flops into ripple and synchronous counters, count modulo-n by resetting, and shift data serially or in parallel. The 555 timer generates a continuous square wave (astable) or a single timed pulse (monostable), and oscillators provide the system clock.

How this module is examined

A typical Eduqas profile for this content:

Boolean work. Simplifying expressions with named laws and De Morgan's, building and reading truth tables, and Karnaugh-map minimisation.
Design. Sum-of-products from a specification, adders and standard blocks, and counter/register design including modulo-n.
Calculations. 555 astable frequency and monostable pulse duration, counter states and frequency division, and binary/hex/two's-complement conversions.
Explanation. Combinational versus sequential, flip-flop behaviour and edge triggering, and ripple versus synchronous counters.

Check your knowledge

A mix of recall and calculation questions covering the module. Attempt them under timed conditions, then check against the solutions.

Apply De Morgan's law to $\overline{A \cdot B}$ . (1 mark)
Give the sum and carry expressions for a half adder. (2 marks)
State the forbidden input combination of an SR latch. (1 mark)
How many states does a counter with four flip-flops have? (1 mark)
A 555 monostable has $R = 47\ \text{k}\Omega$ and $C = 10\ \mu\text{F}$ . Find the pulse duration. (2 marks)
Convert the binary number $1010\,0110$ to denary. (2 marks)

Solutions

Six questions covering De Morgan's law, half adders, SR latches, counters, the 555 timer, and binary conversion.

Step 1: Q1 - Apply De Morgan's law to $\overline{A \cdot B}$

De Morgan's law for a NAND (NOT AND) says: break the bar over the bracket and swap the AND for OR. The complement of (A AND B) becomes (NOT A) OR (NOT B). This is used to simplify Boolean expressions and to build circuits from universal NAND gates.

\overline{A \cdot B} = \overline{A} + \overline{B}

Final answer: $\overline{A} + \overline{B}$ .

Step 2: Q2 - Give the sum and carry expressions for a half adder

A half adder adds two single bits. The sum uses XOR because XOR gives $1$ only when exactly one input is $1$ (the case with no carry). The carry uses AND because a carry of $1$ only arises when both inputs are $1$ .

S = A \oplus B \qquad C = A \cdot B

Final answer: Sum $S = A \oplus B$ ; carry $C = A \cdot B$ .

Step 3: Q3 - State the forbidden input combination of an SR latch

The SR latch has two inputs: Set and Reset. When both are $1$ simultaneously the latch tries to set and reset at the same time, producing an undefined (indeterminate) output. This state is forbidden because the output becomes unpredictable.

Final answer: $S = R = 1$ (both inputs high simultaneously).

Step 4: Q4 - Find the number of states for a 4-flip-flop counter

Each flip-flop stores one bit, so $n$ flip-flops can represent $2^n$ distinct binary patterns. Four flip-flops give $2^4$ combinations, ranging from $0000$ to $1111$ in binary.

2^4 = 16\ \text{states}

Final answer: $16$ states.

Step 5: Q5 - Find the monostable pulse duration

The 555 timer monostable pulse formula is $T = 1.1RC$ . Substituting the given values, with resistance in ohms and capacitance in farads, gives the pulse width in seconds.

T = 1.1RC = 1.1 \times 47000 \times 10 \times 10^{-6} = 0.52\ \text{s}

Final answer: $T = 0.52\ \text{s}$ .

Step 6: Q6 - Convert $1010\,0110$ to denary

Each bit represents a power of 2, with the leftmost bit being $2^7 = 128$ . Add the powers of 2 where a $1$ appears: the set bits are at positions representing $128$ , $32$ , $4$ , and $2$ .

128 + 32 + 4 + 2 = 166

Final answer: $166$ .

Sources & how we know this

Eduqas GCE AS/A Level Electronics specification (A410QS) — WJEC Eduqas (2017)