How do logic gates make decisions, and how do we describe and combine them?
Logic gates (AND, OR, NOT, NAND, NOR, EOR), truth tables, Boolean expressions and combinational logic for decision-making.
A CCEA A-Level Technology and Design answer on the function of AND, OR, NOT, NAND, NOR and EOR gates, their truth tables and Boolean expressions, and combining gates into decision-making combinational logic systems.
Reviewed by: AI editorial process; not yet individually human-reviewed
Have a quick question? Jump to the Q&A page
Jump to a section
What this dot point is asking
CCEA expects you to know the function, truth table and Boolean expression of each common logic gate (AND, OR, NOT, NAND, NOR, EOR/XOR), to combine gates into combinational logic that makes decisions, and to understand that NAND and NOR are universal gates. Designing logic from a word problem is a frequent question.
The answer
The gates and their truth tables
Boolean expressions and universal gates
Combinational logic for decisions
Worked example: designing logic from a requirement
Examples in context
Example 1. Car seatbelt warning. The chime sounds if the ignition is ON AND a seat is occupied AND the belt is NOT fastened, a three-input AND with one inverted input, exactly the machine-guard pattern.
Example 2. Burglar alarm zones. The alarm triggers if zone 1 OR zone 2 OR zone 3 is breached while the system is armed, an OR of the zones gated by the armed signal, showing OR logic in a real product.
Try this
Q1. Write the Boolean expression for a two-input OR gate and state when its output is 0. [2 marks]
- Cue. ; the output is 0 only when both inputs are 0.
Q2. Complete the output for a two-input EOR (XOR) gate for inputs (0,0), (0,1), (1,0), (1,1). [2 marks]
- Cue. 0, 1, 1, 0 - the output is 1 only when the inputs differ.
Q3. Why is NAND described as a universal gate? [1 mark]
- Cue. Any logic function can be built using only NAND gates.
Exam-style practice questions
Practice questions written in the style of CCEA exam questions on this dot point, with worked answer explainers. The year tag is the paper they imitate, not the source.
CCEA 20196 marksA machine must only operate when its guard is closed AND the start button is pressed, but it must stop immediately if an emergency stop is pressed. Design the logic, write the Boolean expression and draw the truth table for the guard and start inputs.Show worked answer →
Let guard closed = , start pressed = , emergency stop pressed = , output (machine on) = .
The machine runs when AND are both true, and the emergency stop is not pressed. Using NOT-E for "emergency not pressed":
This needs a 3-input AND (or two 2-input ANDs) with the emergency-stop signal inverted by a NOT gate first (so pressing E makes and forces , stopping the machine).
Truth table for the guard and start inputs (with E not pressed, so ):
| G | S | Q |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
So the output is 1 only when both G and S are 1. Markers reward the AND condition, the inverted emergency-stop term, the correct Boolean expression , and a correct AND truth table.
CCEA 20214 marksState the Boolean expression and complete the truth table for a two-input NAND gate, and explain why NAND is called a universal gate.Show worked answer →
A NAND gate is an AND followed by a NOT, so its output is the inverse of AND:
Truth table:
| A | B | Q |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
The output is 0 only when both inputs are 1; otherwise it is 1.
NAND is a universal gate because any other logic function (NOT, AND, OR, NOR, etc.) can be built using only NAND gates. This means a whole logic system can be manufactured from one type of gate, simplifying production and stock. Markers want the expression, the correct truth table (only 1-1 gives 0), and the "any function from NAND alone" explanation.
Related dot points
- The systems approach: input, process and output subsystems, block diagrams, signal flow and feedback.
A CCEA A-Level Technology and Design answer on the systems approach to electronics, modelling a circuit as input, process and output subsystems with block diagrams, signal flow, the system boundary and feedback.
- Input transducers (LDR, thermistor, switches) and the potential divider as a sensing subsystem.
A CCEA A-Level Technology and Design answer on input transducers such as the LDR, thermistor and switches, and how a potential divider converts a changing resistance into a changing voltage for the process subsystem to act on.
- The operational amplifier as a comparator and as an inverting/non-inverting amplifier, with gain and the use of a reference voltage.
A CCEA A-Level Technology and Design answer on the operational amplifier used as a comparator that switches when a sensor voltage crosses a reference, and as an inverting or non-inverting amplifier with calculable gain.
- The capacitor-resistor time constant, and the 555 timer in monostable and astable modes.
A CCEA A-Level Technology and Design answer on RC timing and the time constant, and the 555 timer IC configured as a monostable (one-shot delay) and an astable (oscillator), with the equations for pulse length and frequency.
- Output transducers (LED, lamp, buzzer, motor, relay, solenoid), current-limiting resistors and driver/interface circuits.
A CCEA A-Level Technology and Design answer on output transducers such as LEDs, lamps, buzzers, motors, relays and solenoids, calculating the LED current-limiting resistor, and using transistor and relay driver circuits to interface high-power loads to logic.
Sources & how we know this
- CCEA GCE Technology and Design specification — CCEA (2016)