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AQA A-Level Computer Science 4.7 Computer organisation and architecture: the processor, fetch-execute, addressing and storage

A deep-dive AQA A-Level Computer Science guide to 4.7 Computer organisation and architecture. Covers the internal hardware and buses, the stored program concept and Von Neumann and Harvard architectures, the processor components and fetch-execute cycle, addressing modes, and secondary storage.

Generated by Claude Opus 4.818 min read4.7

Reviewed by: AI editorial process; not yet individually human-reviewed

Jump to a section
  1. What 4.7 actually demands
  2. Internal hardware and memory
  3. Stored program and architectures
  4. The processor and the cycle
  5. Addressing and storage
  6. Check your knowledge

What 4.7 actually demands

This module is how the machine actually runs a program. AQA expects you to know the components and buses, explain the stored program concept and the main architectures, trace the fetch-decode-execute cycle naming the registers, distinguish addressing modes, and compare secondary storage types.

Internal hardware and memory

The core components, connected on the motherboard, are the processor, main memory, the system buses and secondary storage. The address bus (unidirectional) carries addresses, the data bus (bidirectional) carries data, and the control bus carries control signals. RAM is volatile working memory, ROM is non-volatile boot firmware, and cache is small fast memory near the processor.

Stored program and architectures

The stored program concept keeps instructions and data together in memory, so the processor fetches and executes them in turn. The Von Neumann architecture uses one shared memory and bus (simple, but with a bottleneck); the Harvard architecture uses separate memories and buses for instructions and data (faster, more complex).

The processor and the cycle

The processor contains the ALU, the control unit and registers (PC, MAR, MDR, CIR, accumulator). The fetch-decode-execute cycle fetches the instruction at the PC's address, increments the PC, decodes it, then executes it. Performance depends on clock speed, cores, cache and word/bus width.

Addressing and storage

A machine code instruction has an opcode and an operand; immediate addressing uses the operand as the value, direct addressing uses it as an address. Secondary storage is needed because RAM is volatile, and comes in magnetic, optical and solid state forms, each with its own trade-offs.

Check your knowledge

  1. State the difference between RAM and ROM. (2 marks)
  2. State the purpose of the address bus. (1 mark)
  3. State the stored program concept. (2 marks)
  4. State the main advantage of the Harvard architecture over Von Neumann. (1 mark)
  5. State the role of the program counter. (1 mark)
  6. Describe the fetch stage of the fetch-decode-execute cycle. (3 marks)
  7. Explain the difference between immediate and direct addressing. (2 marks)
  8. Give one advantage and one disadvantage of solid state storage versus magnetic. (2 marks)

Sources & how we know this

  • computer-science
  • a-level-aqa
  • aqa-computer-science
  • computer-organisation-and-architecture
  • a-level
  • fetch-execute
  • von-neumann
  • registers
  • secondary-storage