How does the processor fetch and carry out a program instruction?
The purpose of the CPU and the fetch-decode-execute cycle, the von Neumann architecture, and the function of common CPU components (ALU, CU, cache, registers including the MAR, MDR, Program Counter and Accumulator).
An OCR J277 1.1.1 answer on the purpose of the CPU, the fetch-decode-execute cycle, the von Neumann architecture, and the function of the ALU, control unit, cache and the named registers (MAR, MDR, Program Counter, Accumulator).
Reviewed by: AI editorial process; not yet individually human-reviewed
Have a quick question? Jump to the Q&A page
Jump to a section
What this dot point is asking
OCR wants you to state the purpose of the CPU, name and describe its common components (the ALU, control unit, cache and the named registers), explain the von Neumann architecture, and trace the fetch-decode-execute cycle in order. This is recall plus the ability to follow a single instruction through the cycle.
The purpose and components of the CPU
The components work as a team. The control unit fetches and interprets each instruction and tells the ALU what to do; the ALU does the arithmetic and logic; the registers hold the small amounts of data each step needs, because they are far faster to reach than RAM; and the cache cuts the time spent waiting for instructions and data that are used over and over.
The four registers OCR names
The von Neumann architecture
The fetch-decode-execute cycle
How the parts cooperate
It helps to see the components and the cycle together. During fetch, the control unit uses the Program Counter to find the next instruction and copies it from RAM via the MAR and MDR. During decode, the control unit interprets the bit pattern to work out the operation and what data it needs. During execute, the control unit directs the work: if it is a calculation the values go to the ALU and the result lands in the Accumulator; if it is a data move, values are copied between registers and memory. The cache speeds the whole loop by keeping frequently used instructions and data close, so fewer fetches have to wait for slow RAM. Registers are central throughout, because they are the only stores fast enough to keep up with the cycle.
Try this
Q1. Name the three stages of the fetch-decode-execute cycle in order. [3 marks]
- Cue. Fetch, decode, execute.
Q2. State which register holds the address of the next instruction to be fetched. [1 mark]
- Cue. The Program Counter (PC).
Q3. State one feature of the von Neumann architecture. [1 mark]
- Cue. Instructions and data are stored together in the same memory and fetched over the same bus.
Exam-style practice questions
Practice questions written in the style of OCR exam questions on this dot point, with worked answer explainers. The year tag is the paper they imitate, not the source.
OCR 20214 marksDescribe the fetch-decode-execute cycle, naming the three stages in order and explaining what happens at each stage.Show worked answer →
Fetch: the CPU copies the next instruction from main memory (RAM) into the CPU. The address of that instruction comes from the Program Counter, which is then incremented so the cycle moves on to the following instruction.
Decode: the control unit works out what the fetched instruction means, that is which operation it is and what data or addresses it needs.
Execute: the CPU carries out the instruction, for example using the ALU to perform a calculation or comparison, or moving data between memory and registers. The cycle then repeats.
Markers reward the correct order (fetch, decode, execute), a sentence on each stage, and a reference to the Program Counter or to repeating; reversing decode and execute loses marks.
OCR 20223 marksState the function of each of the following CPU components: the arithmetic logic unit (ALU), the control unit (CU) and the cache.Show worked answer →
Award one mark for each correct function, up to three.
ALU: carries out all arithmetic (such as addition and subtraction) and logical operations (such as comparisons and AND, OR, NOT).
CU (control unit): decodes instructions and sends out the control signals that direct and coordinate the other components, managing the flow of data inside the CPU.
Cache: very fast memory inside or close to the CPU that stores frequently used instructions and data so they can be reached quickly, reducing waiting time for slower RAM.
Markers reward precise wording. Saying the ALU "controls the CPU" or the cache "stores all the programs" loses the mark.
Related dot points
- How clock speed, the number of cores, and cache size and type affect the performance of the CPU.
An OCR J277 1.1.2 answer on how clock speed, the number of cores, and cache size and type each affect CPU performance, with worked reasoning on why doubling cores does not double speed.
- The purpose and characteristics of embedded systems, with examples, and how they differ from general-purpose computer systems.
An OCR J277 1.1 answer on embedded systems: what they are, their characteristics (dedicated function, low cost, low power, small size), examples, and how they differ from general-purpose computers.
- The need for primary storage, the purpose and characteristics of RAM and ROM, the differences between them, and the need for virtual memory.
An OCR J277 1.2.1 answer on the need for primary storage, the purpose and characteristics of RAM and ROM, the differences between them, and why virtual memory is needed.
- Boolean logic: the operators AND, OR and NOT, applying them to expressions, and constructing truth tables for simple logic statements including combinations of operators.
An OCR J277 2.4.1 answer on Boolean logic: the operators AND, OR and NOT, applying them to expressions, and constructing truth tables for simple logic statements and combinations of operators.
- The purpose and functions of the operating system: user interface, memory management and multitasking, peripheral management and drivers, user management, and file management.
An OCR J277 1.5.1 answer on the purpose and functions of an operating system: the user interface, memory management and multitasking, peripheral management and drivers, user management, and file management.
Sources & how we know this
- OCR GCSE (9-1) Computer Science (J277) specification — OCR (2020)