How does a flip-flop store a single bit, and how is it different from a combinational circuit?
Flip-flops and latches: storing one bit, the difference between sequential and combinational logic, the D-type flip-flop, and edge triggering by a clock.
An Eduqas GCSE Electronics answer on flip-flops and latches: how a flip-flop stores a single bit, the difference between sequential and combinational logic, the D-type flip-flop and how it captures its input on a clock edge, and using flip-flops as memory and to divide frequency.
Reviewed by: AI editorial process; not yet individually human-reviewed
Have a quick question? Jump to the Q&A page
Jump to a section
What this dot point is asking
Eduqas wants you to explain how a flip-flop stores a single bit, the difference between sequential and combinational logic, the D-type flip-flop, and edge triggering by a clock. The flip-flop is the basic unit of memory and the building block of counters and registers.
The answer
Storing one bit
Sequential versus combinational logic
The D-type flip-flop
Edge triggering and the clock
Examples in context
Flip-flops are the memory of digital systems. A single D-type stores one bit, such as remembering that a button has been pressed or holding the on/off state of an output. Chained together, D-types build counters (the next topic) and registers that store multi-bit numbers, and they synchronise inputs to a clock to keep a system orderly. The positive feedback that gives a flip-flop its two stable states is the same idea as the latch in the switching module, tying analogue latching to digital memory.
Try this
Q1. State how many bits a single flip-flop stores. [1 mark]
- Cue. One bit (a single 0 or 1).
Q2. State the difference between a combinational and a sequential circuit in one sentence. [2 marks]
- Cue. A combinational circuit's output depends only on its present inputs; a sequential circuit's also depends on its stored state (it has memory).
Q3. A rising-edge D-type has at a clock edge with beforehand. State Q just after the edge. [1 mark]
- Cue. (Q copies D on the edge).
Exam-style practice questions
Practice questions written in the style of WJEC Eduqas exam questions on this dot point, with worked answer explainers. The year tag is the paper they imitate, not the source.
Eduqas 20204 marksExplain the difference between a combinational logic circuit and a sequential logic circuit, and give an example of each.Show worked answer →
Combinational (up to 2 marks): the output depends only on the present inputs, with no memory of previous states; the output changes immediately when the inputs change. Example: a logic gate, an adder or a decoder.
Sequential (up to 2 marks): the output depends on the present inputs and on the stored state (the past), so the circuit has memory; many sequential circuits change state on a clock edge. Example: a flip-flop or a counter.
Markers reward the present-inputs-only versus present-inputs-plus-memory distinction and a correct example of each (gate/adder for combinational, flip-flop/counter for sequential).
Eduqas 20224 marksDescribe how a D-type flip-flop responds to its clock input, and explain what 'edge triggered' means.Show worked answer →
D-type behaviour (up to 2 marks): a D-type flip-flop copies the logic level on its D (data) input to its Q output at the moment the clock changes; between clock edges the output holds its value regardless of changes on D.
Edge triggered (up to 2 marks): the flip-flop responds only at the instant the clock changes (for example on the rising edge, when the clock goes from 0 to 1), not while the clock is steadily high or low. So D is sampled just once per clock edge.
Markers reward Q taking the value of D on the clock edge and holding otherwise, and the meaning of edge triggering (action only at the moment of the clock transition).
Related dot points
- Latching switches and feedback: using a relay or positive feedback to latch an output on, the need for a reset, and how feedback gives a snap (Schmitt) action that avoids chatter.
An Eduqas GCSE Electronics answer on latching and feedback in switching circuits: using a relay or positive feedback to hold an output on once triggered, the need for a reset, and how positive feedback produces a clean snap (Schmitt) switching action that avoids chatter near the threshold.
- Counters: chaining flip-flops to count clock pulses in binary, frequency division by each stage, and the modulus of a counter.
An Eduqas GCSE Electronics answer on counters: how chained flip-flops count clock pulses in binary, how each stage divides the frequency by two, the modulus (number of states) of a counter, and using counters to divide frequency and count events.
- Logic gates: AND, OR, NOT, NAND, NOR and XOR, their symbols and truth tables, and the digital high and low logic levels.
An Eduqas GCSE Electronics answer on logic gates: the AND, OR, NOT, NAND, NOR and XOR gates with their symbols and truth tables, the meaning of logic high and logic low, and how a truth table lists the output for every combination of inputs.
- The 555 monostable: producing a single output pulse when triggered, the pulse-duration equation, and using a monostable for timed delays and switch debouncing.
An Eduqas GCSE Electronics answer on the 555 timer in monostable mode: how a trigger produces a single output pulse, the pulse-duration equation, choosing the timing resistor and capacitor for a target time, and using a monostable for timed delays and switch debouncing.
Sources & how we know this
- WJEC Eduqas GCSE (9-1) Electronics specification (C490) — WJEC Eduqas (2017)