How does the processor fetch and execute instructions, and what affects its performance?
The components of the CPU, the role of memory and buses, the fetch-decode-execute cycle, and the factors that affect processor performance.
A CCEA A-Level Digital Technology answer on computer architecture: the components of the CPU, the role of memory and buses, the fetch-decode-execute cycle, and the factors that affect processor performance.
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What this dot point is asking
CCEA wants you to describe the components of the CPU, the role of memory and the buses, the fetch-decode-execute cycle, and the factors that affect processor performance. This explains how a computer actually runs the binary instructions of a program.
The components of the CPU
Key registers include the program counter (PC), holding the address of the next instruction; the current instruction register (CIR), holding the instruction being executed; the memory address register (MAR), holding the address to read or write; and the memory data register (MDR), holding the data being transferred. The CPU connects to main memory through three buses: the address bus (carries addresses), the data bus (carries data and instructions) and the control bus (carries control signals such as read or write).
Memory and storage
Main memory (RAM) holds the programs and data currently in use; it is fast but volatile (cleared when power is lost). The CPU reads instructions and data from memory and writes results back. Because main memory is slower than the CPU, a small amount of very fast cache sits between them holding frequently used items, and detailed storage devices are covered in the hardware dot point.
The fetch-decode-execute cycle
Factors affecting performance
Several factors decide how fast a CPU runs. Clock speed (in gigahertz) sets how many cycles happen per second, so a higher clock speed means more instructions per second. Number of cores lets a multi-core CPU run several instruction streams in parallel, helping tasks that can be split up. Cache size reduces slow trips to main memory: a larger cache holds more frequently used data close to the CPU, so it stalls less often. Word length and bus width also affect how much data moves per cycle.
Try this
Q1. Name the register that holds the address of the next instruction to be fetched. [1 mark]
- Cue. The program counter.
Q2. State which bus carries the read or write control signals between the CPU and memory. [1 mark]
- Cue. The control bus.
Q3. Explain why a larger cache can improve CPU performance. [2 marks]
- Cue. Cache holds frequently used data and instructions close to the CPU, so a larger cache means fewer slow accesses to main memory, reducing stalls and increasing speed.
Exam-style practice questions
Practice questions written in the style of CCEA exam questions on this dot point, with worked answer explainers. The year tag is the paper they imitate, not the source.
CCEA AS 26 marksDescribe the fetch-decode-execute cycle carried out by the CPU.Show worked answer →
Take the three phases in order, naming the key registers.
Fetch: the address of the next instruction is held in the program counter; this address is placed on the address bus and the instruction at that location is copied from memory along the data bus into the memory data register, then into the current instruction register. The program counter is incremented to point to the next instruction.
Decode: the control unit decodes the instruction in the current instruction register to work out what operation is required and which data or addresses it needs.
Execute: the operation is carried out, for example the arithmetic logic unit performs a calculation, data is moved to or from a register, or the program counter is changed for a jump. The cycle then repeats.
Markers award marks for the three named phases in order, the role of the program counter and the incrementing step, and the involvement of the control unit and the arithmetic logic unit. Listing the registers with no description of what happens limits the marks.
CCEA AS 24 marksExplain two factors that affect the performance of a CPU.Show worked answer →
Choose two factors and explain the mechanism by which each changes performance.
Clock speed: the number of cycles per second (measured in gigahertz). A higher clock speed means more fetch-decode-execute cycles per second, so more instructions are processed in a given time.
Number of cores: each core can execute its own instruction stream, so a multi-core processor can run several instructions truly in parallel, improving performance for tasks that can be split across cores.
Cache size: cache is fast memory close to the CPU holding frequently used data and instructions; a larger cache means fewer slow trips to main memory, so the CPU stalls less and runs faster.
Markers reward two distinct factors each with a correct explanation of why it changes performance. Naming factors with no explanation (for example just "clock speed and cores") caps the mark.
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Sources & how we know this
- CCEA GCE Digital Technology specification — CCEA (2016)