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AS 2 Fundamentals of Digital Technology
Quick questions on Computer architecture: the CPU and the fetch-decode-execute cycle - CCEA A-Level Digital Technology
3short Q&A pairs drawn directly from our worked dot-point answer. For full context and worked exam questions, read the parent dot-point page.
What is q1?Show answer
Name the register that holds the address of the next instruction to be fetched. [1 mark]
What is q2?Show answer
State which bus carries the read or write control signals between the CPU and memory. [1 mark]
What is q3?Show answer
Explain why a larger cache can improve CPU performance. [2 marks]
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