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EnglandComputer ScienceQuick questions
1.1 Components of a computer and their uses
Quick questions on Processor architecture and the fetch-decode-execute cycle - OCR A-Level Computer Science H446
4short Q&A pairs drawn directly from our worked dot-point answer. For full context and worked exam questions, read the parent dot-point page.
What are the three buses?Show answer
The defining feature of the von Neumann architecture is the stored-program concept: instructions and data are held in the same memory and travel on the same bus. This is simpler and cheaper than the Harvard architecture, which uses separate memories and buses for instructions and data (common in microcontrollers and DSPs because instructions and data can be fetched simultaneously). The shared bus creates the von Neumann bottleneck, where the single path between CPU and memory limits throughput.
What is q1?Show answer
State which register is incremented during the fetch stage and explain why. [2 marks]
What is q2?Show answer
A processor has a 16-line address bus. State the maximum number of memory locations it can address. [1 mark]
What is q3?Show answer
State one difference between the von Neumann and Harvard architectures. [1 mark]
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