Eduqas A-Level Computer Science computer architecture and hardware overview quiz quiz

The control unit, which decodes and coordinates

The program counter, which holds the next address

The data bus, which transfers values to memory

The arithmetic and logic unit (ALU)

unidirectional and carries memory addresses from the CPU

bidirectional and carries both data and instructions to and fro

used only for timing and interrupt control signals

physically the same component as the accumulator register

instructions and data are stored in separate memories

there is no main memory

instructions and data share the same memory and bus

the CPU has no registers

accumulator (ACC)

current instruction register (CIR)

control unit

memory address register (MAR)

overwritten with the target address

simply incremented to the following instruction

cleared to zero so execution restarts at the top

copied unchanged into the accumulator register

the address of the value

the actual value to use

the address of an address

always zero

a large set of complex, variable-length instructions taking many cycles each

having no general-purpose registers at all

a small set of simple, fixed-length instructions, often one cycle each

being structurally unable to pipeline any work

using a much slower clock signal so that each separate instruction has more time to finish

removing the cache so the CPU reads from main memory directly

storing intermediate data on the hard disk between stages

overlapping the fetch, decode and execute stages of successive instructions

tasks that can be split (parallelised)

every possible task by the same factor

only strictly sequential single-threaded tasks

nothing at all on any workload

Secondary storage

Registers

Main memory (RAM)

Cache

magnetisation on spinning platters

pits and lands read by a laser

flash memory with no moving parts

punched holes in card

Peer-to-peer

Bus topology

Mesh topology

Client-server