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What happens during the fetch-decode-execute cycle, and what is the role of each register?

The fetch-decode-execute cycle and the roles of the registers used in it (the program counter, memory address register, memory data register and accumulator).

A focused answer to the WJEC GCSE Computer Science Unit 1 content on the fetch-decode-execute cycle, covering the three stages of fetch, decode and execute, the roles of the program counter, memory address register, memory data register and accumulator, and how the cycle repeats to run a program.

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  1. What this topic is asking
  2. The three stages
  3. The registers used
  4. How the registers work together
  5. Why the cycle matters
  6. Try this

What this topic is asking

WJEC wants you to know the three stages of the fetch-decode-execute cycle and the roles of the registers involved (the program counter, memory address register, memory data register and accumulator). This is part of the Hardware content in Unit 1 of WJEC GCSE Computer Science (3500).

The three stages

The registers used

How the registers work together

Why the cycle matters

The fetch-decode-execute cycle is the fundamental operation of every CPU: a program is just a long list of simple instructions, and the CPU runs it by repeating this cycle extremely fast. Understanding the cycle explains why clock speed and the number of cores affect performance, since they change how many cycles can run per second.

Try this

Q1. State what is stored in the memory address register (MAR). [1 mark]

  • Cue. The address of the memory location currently being read from or written to.

Q2. State the three stages of the cycle in order. [1 mark]

  • Cue. Fetch, decode, execute.

Exam-style practice questions

Practice questions written in the style of WJEC exam questions on this dot point, with worked answer explainers. The year tag is the paper they imitate, not the source.

WJEC-style Unit 13 marksDescribe the three stages of the fetch-decode-execute cycle.
Show worked answer →

A Unit 1 describe question. In the fetch stage, the next instruction is copied from main memory into the CPU, using the address held in the program counter (1 mark). In the decode stage, the control unit works out what the fetched instruction means and what needs to be done (1 mark). In the execute stage, the instruction is carried out, for example the ALU performs a calculation or data is moved, and the result may be stored (1 mark). Markers reward all three stages in order with a sensible description of each. A common error is to merge decode and execute, or to leave out that fetch uses the program counter.

WJEC-style Unit 13 marksState the role of the program counter (PC) and explain how it changes during normal program execution.
Show worked answer →

A Unit 1 register question. The program counter holds the memory address of the next instruction to be fetched (1 mark). After an instruction is fetched, the program counter is automatically increased so that it points to the following instruction, so the CPU works through the program in order (1 mark). When a jump or branch instruction runs, the program counter can be changed to a different address so that execution continues elsewhere (1 mark). Markers reward holding the next address and incrementing each cycle. A common error is to say the program counter stores the instruction itself rather than its address.

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