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How do we combine gates to control an output, and how do NAND gates and Boolean expressions help?

Combinational logic: combining gates to meet a control requirement, completing the truth table of a combined circuit, NAND and NOR gates, and reading a Boolean expression.

An SQA National 5 Engineering Science answer on combinational logic, covering how gates are combined to control an output, completing the truth table of a combined circuit, the NAND and NOR gates as inverted AND and OR, and writing a Boolean expression for a logic system.

Generated by Claude Opus 4.810 min answer

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  1. What this key area is asking
  2. Combining gates
  3. NAND and NOR gates
  4. Completing a combined truth table
  5. Boolean expressions
  6. Why combinational logic matters
  7. Try this

What this key area is asking

The SQA wants you to combine logic gates to meet a control requirement, complete the truth table of a combined circuit, recognise the NAND and NOR gates as inverted AND and OR, and read a simple Boolean expression.

Combining gates

Real control problems rarely need a single gate. They need conditions such as "run the motor when both safety guards are closed" or "sound the alarm when it is hot OR smoke is detected". These are built by combining AND, OR and NOT gates so the output follows the required rule.

NAND and NOR gates

NAND and NOR are useful because they are simple to manufacture and because any logic function can be built from NAND gates alone (or NOR gates alone). At National 5 you should recognise them and complete their truth tables.

Completing a combined truth table

Work through a combined circuit one gate at a time. For each row of inputs, find the output of the first gate, then feed that into the next gate, and so on to the final output.

Boolean expressions

A Boolean expression is a compact way of writing a logic function. The standard notation is:

  • AND is written as a dot or by writing the letters together: ABA \cdot B.
  • OR is written as a plus: A+BA + B.
  • NOT is written with a bar over the variable: A\overline{A}.

So "Q is 1 when A AND B are both 1" is Q=ABQ = A \cdot B, and "Q is 1 when A is high OR B is low" is Q=A+BQ = A + \overline{B}. Being able to read these lets you describe a circuit's behaviour quickly.

Why combinational logic matters

Combinational logic is how digital control systems make multi-condition decisions, which is central to the engineering assignment and to real safety systems (machine guards, interlocks, automatic alarms). It also leads into programmable control, where a microcontroller replaces a fixed network of gates with software.

Try this

Q1. Which single gate is equivalent to an AND gate followed by a NOT gate? [1 mark]

  • Cue. A NAND gate.

Q2. Write the Boolean expression for "Q is 1 when A OR B is 1". [1 mark]

  • Cue. Q=A+BQ = A + B.

Q3. A NOR gate has inputs A = 0 and B = 0. State the output. [1 mark]

  • Cue. Output 1 (a NOR outputs 1 only when all inputs are 0).

Exam-style practice questions

Practice questions written in the style of SQA exam questions on this dot point, with worked answer explainers. The year tag is the paper they imitate, not the source.

SQA N5 style3 marksA machine guard must allow a motor to start only when guard A is closed AND guard B is closed. The motor must also be stopped by a separate emergency stop. Describe the logic gates needed for the two guard inputs and state the output when one guard is open.
Show worked answer →

Reason about which gate enforces the requirement.

The motor starts only when both guards are closed, which is the AND condition, so the two guard inputs feed an AND gate.

If one guard is open, that input is logic 0. With an AND gate, any input at 0 forces the output to 0, so the motor does not start.

The emergency stop would be combined separately (for example, the AND output is only allowed through when the stop is not pressed).

Markers reward identifying the AND gate for the two guards, and correctly stating the output is 0 (motor off) when one guard is open.

SQA N5 style2 marksState what a NAND gate is, and give its output when both of its two inputs are logic 1.
Show worked answer →

Define NAND as an inverted AND and apply it.

A NAND gate is an AND gate followed by a NOT, so its output is the inverse of an AND gate.

When both inputs are 1, an AND gate would output 1, so the NAND gate (which inverts that) outputs 0.

Markers reward defining NAND as NOT-AND (inverted AND) and the correct output of 0 when both inputs are high.

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