Sequential logic with memory: flip-flops storing a bit, counters dividing and counting pulses, and astable and monostable timing circuits.

What this key area is asking

The SQA wants you to distinguish sequential logic, whose output depends on the sequence of past inputs as well as the present ones, from combinational logic. You must explain the flip-flop as a one-bit memory, how counters built from flip-flops count and divide pulses, and how astable and monostable timing circuits generate continuous pulse trains and single timed pulses.

Memory: the flip-flop

The key difference from combinational logic is state: a flip-flop remembers what it was last told, so the same inputs can give different outputs depending on history. This memory is what lets a circuit count, sequence operations, or latch the result of a momentary event such as a button press.

Counters and frequency division

A counter is a chain of flip-flops in which each stage toggles half as often as the one before. This has two uses at once. As a counter it steps through binary numbers $0, 1, 2, \dots$ on each clock pulse; as a frequency divider each bit halves the frequency, so the output of an $n$-bit counter has a frequency of $f_{clock} / 2^n$.

So a 4-bit counter has 16 states (counting 0 to 15) and divides the clock by 16; an 8-bit counter reaches 255 and divides by 256. Counters that count down, or that reset early to count to a value other than a power of two (a modulo-$N$ counter), are built by adding logic to detect the reset value.

Timing: astable and monostable

The timing of both is set by RC components, so the time constant ideas from analogue signal processing reappear here. An astable's frequency and a monostable's pulse length both depend on $R$ and $C$, so choosing those values sets the clock rate or the delay.

Examples in context

A digital clock divides a crystal oscillator down to a one-second pulse with a counter chain, then counts seconds, minutes and hours in more counters. A washing-machine programmer steps through wash stages on each clock tick using a sequential controller. A switch debounce uses a monostable so that the contact bounce of a mechanical button produces just one clean pulse. A flashing indicator uses an astable to switch a lamp on and off at a set rate. These show memory and timing working together.

Try this

Q1. State how many states an $n$-bit counter has. [1 mark]

• Cue. $2^n$ states.

Q2. A 6-bit counter is driven by a $640\ \text{Hz}$ clock. Find the most significant bit output frequency. [2 marks]

• Cue. $f = \dfrac{640}{2^6} = \dfrac{640}{64} = 10\ \text{Hz}$.

Q3. State the difference between an astable and a monostable circuit. [2 marks]

• Cue. An astable oscillates continuously (a clock); a monostable gives a single timed pulse when triggered.