Understand the AND, OR and NOT logic gates, construct and interpret truth tables, and build and read simple logic circuits.

What this dot point is asking

AQA wants you to know the AND, OR and NOT logic gates, build and read truth tables for them, and interpret simple logic circuits and Boolean expressions that combine the gates.

Logic gates

The three gates

Truth tables

The AND, OR and NOT truth tables are:

AND          OR           NOT
A B | Out    A B | Out    A | Out
0 0 |  0     0 0 |  0      0 |  1
0 1 |  0     0 1 |  1      1 |  0
1 0 |  0     1 0 |  1
1 1 |  1     1 1 |  1

Logic circuits

You may be given a circuit or a Boolean expression that combines gates, such as $Q = (A \text{ AND } B) \text{ OR NOT } C$, and asked to complete its truth table. The reliable method is to add a column for each gate, fill the intermediate columns first, then combine them for the final output.

Reading a logic circuit diagram

In the exam a circuit may be drawn with gate symbols rather than written as an expression. The standard symbols are a flat-backed D shape for AND, a curved-backed shield for OR, and a triangle with a small circle on the output for NOT (the circle means "invert"). To work out the output, label the value on every wire: start from the inputs on the left, write the output of each gate on its output wire, and carry those values forward into the next gate until you reach the final output on the right. Converting the diagram into a written expression first, such as $(A \text{ AND } B) \text{ OR NOT } C$, often makes the truth table easier to complete.

Why logic gates matter

Logic gates are not just an abstract exercise: they are how the processor actually computes. The arithmetic logic unit adds binary numbers using circuits built from AND, OR and NOT gates (a half adder uses an AND and an exclusive-OR), and memory cells, decision-making and control signals are all built from the same building blocks. This is the link back to why computers use binary: two-state signals (0 and 1) flow through gates that follow fixed logical rules, so complex behaviour is built from these few simple components.

Try this

Q1. State the output of an AND gate when both inputs are 1. [1 mark]

• Cue. 1.

Q2. Complete the output column for an OR gate with inputs (0,0), (0,1), (1,0), (1,1). [2 marks]

• Cue. 0, 1, 1, 1.